What are the basic steps of the VHDL language design of the combined circuit?
* Question
| What are the basic steps of the VHDL language design of the combined circuit? |
* Answer
| (1) System design: Decompose the digital system that needs to be designed into various functional modules, and correctly describe the interface and performance of the functional modules.
(2) Logic design: On the basis of system design, VHDL is used to logically design each module, that is, correctly describe the function and logic relationship of the module. (4) Logic synthesis: If the functional simulation meets the design requirements, logic synthesis can be performed. (5) Place and route: After the logic synthesis is completed, the specific physical design, that is, the layout and layout design, can be mapped to the internal logic resources of the programmable logic device such as FPGA, and the logic resources are sought betweenThe best wiring and connections. |
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